Optimizing cleaning for low standoff components

As computing chips evolve to offer enhanced functionalities, packages like SiP, fcBGA, PoP, and
2.5D have become more intricate, incorporating larger die sizes, increased bump counts, and lower standoff heights. These advancements have posed challenges in achieving effective cleaning.

The interconnects in these packages commonly use solder. Post-soldering, flux residues create significant cleaning hurdles, particularly beneath low-profile components. With standoff heights decreasing to less than 50μ, outgassing during reflow diminishes, further complicating flux residue removal. Components such as QFNs and LGAs with large thermal pads add to these challenges, risking reliability issues including electrochemical migration and electrical leakage.

Understanding the nuances of cleaning processes, especially in conveyorized spray-in-air inline systems is critical for overcoming these challenges. This study will focus on optimizing cleaning parameters to ensure reliable performance and durability under harsh conditions. From analyzing the arrangement and orientation of spray bars to controlling pressure and spray nozzle distance from the belt of wash and rinse modules, optimizing these parameters is essential to balance cleaning effectiveness while minimizing potential damage to delicate components.

The study will utilize various test vehicles with low standoff components, using both No-clean and RMA solder formulations. Two aqueous-based cleaning agents will be evaluated, and cleanliness assessed through visual inspection, SIR, and IC testing following IPC standards. The results will provide insights into optimization advantages, helping manufacturers reduce risk of failures, improve efficiency, and ensure optimal cleaning consistency and repeatability.
SMTAI Abstract

Key words: Advanced Packaging, Electrochemical Migration, Electrical Leakage, Reliability, Interconnects, Miniaturization, Reliability testing